A new architecture for high-frequency variable-load inverters

Efficient generation and delivery of high-frequency (HF, 3-30 MHz) power into variable load impedances is difficult, resulting in HF inverter (or power amplifier) systems that are bulky, expensive and inefficient. This paper introduces a new inverter architecture and control approach that directly addresses this challenge, enabling radio-frequency power delivery into widely variable loads while maintaining efficient zero-voltage switching operation. We model the proposed architecture, develop design and control guidelines for it and analyze the range of load admittances over which it can efficiently operate and deliver a specified output power. The opportunities posed by the proposed approach are illustrated through time-domain simulations of an example HF inverter system

Switched-capacitor step-down rectifier for low-voltage power conversion

This paper presents a switched-capacitor rectifier that provides step down voltage conversion from an ac input voltage to a dc output. Coupled with current-drive source, low-loss and high step-down rectification is realized. Implementation in CMOS with appropriate controls results in a design suitable for low-voltage very-high-frequency conversion. Applications include switched-capacitor rectification to convert high-frequency ac to a dc output and, combined with inversion and transformation, to dc-dc converters for low-voltage outputs. A two-step CMOS integrated full-bridge switched-capacitor rectifier is implemented in TSMC 0.25 μm CMOS technology for demonstration purposes. For an operation frequency of 50 MHz and an output voltage of 2.5 V, the peak efficiency of the rectifier is 81% at a power level of 4 W.Interconnect Focus Center (United States. Defense Advanced Research Projects Agency and Semiconductor Research Corporation

An RF-input outphasing power amplifier with RF signal decomposition network

This work presents an outphasing power amplifier that directly amplifies a modulated RF input. The approach eliminates the need for multiple costly IQ modulators and baseband signal component separation found in conventional outphasing power amplifier systems, which have previously required both an RF carrier input and a separate baseband input to synthesize a modulated RF output. A novel RF signal decomposition network enables direct RF-input / RF-output outphasing by directly synthesizing the phase- and amplitude-modulated RF signals that drive the branch PAs from the modulated RF input waveform. The technique is demonstrated at 2.14 GHz in a four-way lossless outphasing amplifier system with transmission-line-based power combiner. The resulting proof-of-concept outphasing power amplifier has a peak CW output power of 95 W, and peak drain efficiency of 72%

Four-Way Microstrip-Based Power Combining for Microwave Outphasing Power Amplifiers

A lossless multi-way outphasing and power combining system for microwave power amplification is presented. The architecture addresses one of the primary drawbacks of Chireix outphasing; namely, the sub-optimal loading conditions for the branch power amplifiers. In the proposed system, four saturated power amplifiers interact through a lossless power combining network to produce nearly resistive load modulation over a 10:1 range of output powers. This work focuses on two microstrip-based power combiner implementations: a hybrid microstrip/discrete implementation using a combination of microstrip transmission line sections with discrete shunt elements, and an all-microstrip implementation incorporating open-circuited radial stubs. We demonstrate and compare these techniques in a 2.14 GHz power amplifier system. With the all-microstrip implementation, the system demonstrates a peak CW drain efficiency of 70% and drain efficiency of over 60% over a 6.5-dB outphasing output power range with a peak power of over 100 W. We demonstrate W-CDMA modulation with 55.6% average modulated efficiency at 14.1 W average output power for a 9.15-dB peak to average power ratio (PAPR) signal. The performance of this all-microstrip system is compared to that of the proposed hybrid microstrip/discrete version and a previously reported implementation in discrete lumped-element form.Massachusetts Institute of Technology. Center for Integrated Circuits and SystemsMassachusetts Institute of Technology. Microsystems Technology Laboratories. GaN Energy Initiativ

Power conversion architecture for grid interface at high switching frequency

This paper presents a new power conversion architecture for single-phase grid interface. The proposed architecture is suitable for realizing miniaturized ac-dc converters operating at high frequencies (HF, above 3 MHz) and high power factor, without the need for electrolytic capacitors. It comprises of a line-frequency rectifier, a stack of capacitors, a set of regulating converters, and a power combining converter (or set of power combining converters). The regulating converters have inputs connected to capacitors on the capacitor stack, and provide regulated outputs while also achieving high power factor, with twice-line-frequency energy buffered on the capacitor stack. The power combining converter combines power from the individual regulated outputs to a single output, and may also provide isolation. While this architecture can be utilized with a variety of circuit topologies, it is especially suited for systems operating at HF (above 3 MHz), and we introduce circuit implementations that enable efficient operation in this range. The proposed approach is demonstrated for an LED driver operating from 120 V[subscript ac], and supplying a 35 V, 30 W output. The prototype converter operates at a (variable) switching frequency of 5-10 MHz and an efficiency of > 93%. The converter achieves a displacement power density of 130 W/in[superscript 3], while providing a 0.89 power factor, without the use of electrolytic capacitors

Theory and Implementation of RF-Input Outphasing Power Amplification

Conventional outphasing power amplifier systems require both a radio frequency (RF) carrier input and a separate baseband input to synthesize a modulated RF output. This work presents an RF-input/RF-output outphasing power amplifier that directly amplifies a modulated RF input, eliminating the need for multiple costly IQ modulators and baseband signal component separation as in previous outphasing systems. An RF signal decomposition network directly synthesizes the phase- and amplitude-modulated signals used to drive the branch power amplifiers (PAs). With this approach, a modulated RF signal including zero-crossings can be applied to the single RF input port of the outphasing RF amplifier system. The proposed technique is demonstrated at 2.14 GHz in a four-way lossless outphasing amplifier with transmission-line power combiner. The RF decomposition network is implemented using a transmission-line resistance compression network with nonlinear loads designed to provide the necessary amplitude and phase decomposition. The resulting proof-of-concept outphasing power amplifier has a peak CW output power of 93 W, peak drain efficiency of 70%, and performance on par with a previously-demonstrated outphasing and power combining system requiring four IQ modulators and a digital signal component separator

Optimization of Integrated Transistors for Very High Frequency DC-DC Converters

This paper presents a method to optimize integrated lateral double-diffused MOSFET transistors for use in very high frequency (VHF, 30-300 MHz) dc-dc converters. A transistor model valid at VHF switching frequencies is developed. Device parameters are related to layout geometry and the resulting layout versus loss tradeoffs are illustrated. A method of finding an optimal layout for a given converter application is developed and experimentally verified in a 50-MHz converter, resulting in a 54% reduction in power loss over a hand-optimized device. It is further demonstrated that hot-carrier limits on device safe operating area may be relaxed under soft switching, yielding significant further loss reduction. A device fabricated with 3-μm gate length in 20-V design rules is validated at 35 V, offering reduced parasitic resistance and capacitance, as compared to the 5.5-μm device. Compared to the original design, loss is up to 75% lower in the example application

Stacked Switched Capacitor Energy Buffer Architecture

Electrolytic capacitors are often used for energy buffering applications, including buffering between single-phase ac and dc. While these capacitors have high energy density compared to film and ceramic capacitors, their life is limited. This paper presents a stacked switched capacitor (SSC) energy buffer architecture and some of its topological embodiments, which when used with longer life film capacitors overcome this limitation while achieving effective energy densities comparable to electrolytic capacitors. The architectural approach is introduced along with design and control techniques. A prototype SSC energy buffer using film capacitors, designed for a 320 V dc bus and able to support a 135 W load, has been built and tested with a power factor correction circuit. It is shown that the SSC energy buffer can successfully replace limited-life electrolytic capacitors with much longer life film capacitors, while maintaining volume and efficiency at a comparable level

Lossless Multiway Power Combining and Outphasing for High-Frequency Resonant Inverters

A lossless multi-way power combining and outphasing system have recently been proposed for high-frequency inverters and power amplifiers that offers major performance advantages over traditional approaches. This paper presents outphasing control strategies for the proposed power combining system that enable output power control through effective load modulation of the inverters. It describes a straightforward power combiner design methodology and enumerates various possible topological combiner implementations. Moreover, this study presents the first-ever experimental demonstration of the proposed outphasing system. The design of a 27.12 MHz, four-way power combining and outphasing system is described and used to experimentally verify the power combiner's characteristics. The proposed outphasing law is shown to be effective in controlling the output power over a 10-100 W (10:1) power range

A multilevel energy buffer and voltage modulator for grid-interfaced micro-inverters

Micro-inverters operating into the single-phase grid from solar photovoltaic (PV) panels or other low-voltage sources must buffer the twice-line-frequency variations between the energy sourced by the PV panel and that required for the grid. Moreover, in addition to operating over wide average power ranges, they inherently operate over a wide range of voltage conversion ratios as the line voltage traverses a cycle. These factors make the design of micro-inverters challenging. This paper presents a multilevel energy buffer and voltage modulator (MEB) that significantly reduces the range of voltage conversion ratios that the dc-ac converter portion of the micro-inverter must operate over by stepping its effective input voltage in pace with the line voltage. The MEB also functions as an active energy buffer to reduce the twice-line-frequency voltage ripple at the output of the solar panel. The small additional loss of the MEB can be compensated by the improved efficiency of the dc-ac converter stage, leading to a higher overall system efficiency. A prototype micro-inverter incorporating a MEB, designed for 27 V to 38 V dc input voltage, 230 V rms ac output voltage, and rated for line cycle average power of 70 W, has been built and tested in grid-connected mode. It is shown that the MEB can successfully enhance the performance of a single-phase grid-interfaced micro-inverter by increasing its efficiency and reducing the total size of the twice-line-frequency energy buffering capacitance